2 input nand gate using single electron transistor.pdf - PDFQueen - PDF Search engine. Free unlimited pdf search and download.

by MY Jeong - 1997 - Cited by 17

http://nano.korea.ac.kr/paper/1997/Int_journal_1997_1.pdf

Figure 11 Design of an SE-based two-input NAND gate. .... for NOR and NAND logic gates using single electron transistors', Proceedings of the 2005 NSTI ...

http://inderscience.metapress.com/index/980CV2DGV0FRF356.pdf

by A Venkataratnam - Cited by 2

http://lib.semi.ac.cn:8080/tsh/dzzy/wsqk/selected papers/nanotechnology conference/05-3-176.pdf

Fig. 2. Input and output signals of the NAND gate. Fig. 1. The designed NAND gate in two .... Analytical Modeling of Single Electron Transistor for Hybrid CMOS- ... nanoelectronic single electron 2–4 decoder using a novel simulator”, ...

http://ieeexplore.ieee.org/iel5/4621519/4621520/04621550.pdf?arnumber=4621550

circuits using transistors of a single type.6,7 For performance of multi-input functions, ... Vertical flipping of the NOR gate yields a NAND gate with similar performance. ... The inverter and both 2-input gates function correctly ...

http://ieeexplore.ieee.org/iel5/4816218/4887776/04887802.pdf?arnumber=4887802

This paper analyses the Single Electron Transistor based BCD arithmetic circuits. .... R2 = R3 = C * Vp / (CI2 – 2* C*Vp/R1). (5). Basic Logic Gates using SET'S ... Figure 3e: NAND Gate. Figure 3f: NAND Gate input-output ...

http://www.ripublication.com/ijna/ijnav1n2_7.pdf

Single electron transistor logic (SETL) can be characterized by HSPICE simulation using a SPICE macro .... Fig 2. Schematics of the two-input NAND gate ...

http://smdl.snu.ac.kr/Research/annual/annual2000/KKR00.PDF

by YJ Choi - 2002 - Cited by 7

http://smdl.snu.ac.kr/Research/pdf_paper/2002/Journal/cyj_ted_2002.pdf

and basic logic gates. Single electron basic logic gates can be .... struct a 3-input NAND and an OAI based on a 2-input NOR suggested by Chen ... Electron Transistors: Specific Design Using Pass-Transistor Logic”, IEEE Trans. ...

http://www.springerlink.com/index/KR6NW4881Q3C1YCQ.pdf

logic circuits implemented using Single Electron Transistors (SETs) operating in the .... 3. a) NAND gate based implementation of 2 bit comparator. b) Binary .... Single-electron device using Si nanodot array and multi-input gates. ...

http://www.springerlink.com/index/XG6U14831504904M.pdf

and the single-electron transistor (SET) to efficiently realize symmetric Boolean functions [4]. ... conventional Boolean gates. An n-input NAND or NOR or .... Figure 2. (a) Equivalent circuit of the multiple-input floating-gate ...

http://www.iop.org/EJ/article/0957-4484/18/49/495201/nano7_49_495201.pdf

by JC Perry - 2005 - Related articles

http://scholar.lib.vt.edu/theses/available/etd-07022005-171746/unrestricted/thesis.pdf

2 Majority Gate Using Irreversible Single Electron Box. The main component of the proposed cell .... result function will be a NAND function (Eq. 3): ..... electron transistor: Specific design using pass-transistor logic,” IEEE Trans. ...

http://www.m-hikari.com/ces/ces2009/ces1-4-2009/soheiliCES1-4-2009.pdf

3.3 Single-Electron Transistors in Nanocrystalline Silicon . ... 4.5.2 Single-gate L-SEM . ... 6.2.3 Complementary SET NAND and NOR gates . . . . . . . . . . . . . 219 ... 6.2.5 Logic using SETs with multiple input terminals . ...

http://www.worldscibooks.com/etextbook/p650/p650_toc.pdf

Figure 2. Schematic circuit diagram for (a) 2-input CMOS NAND gate using P- and N-FET, (b) 2-input NAND gate using single electron transistor (SET). ...

http://baywood.metapress.com/index/D1H1YYDTEQW8UYJU.pdf

by JB Gao - 2005 - Cited by 20

http://yanqi.org/wp-content/uploads/2008/07/nano_bif.pdf

by HL Chan - 1996 - Cited by 74

http://www.eecs.umich.edu/~mazum/PAPERS-MAZUM/MVLsynthesis.pdf

by G Merrett - Cited by 10

http://eprints.ecs.soton.ac.uk/9481/01/MERRETT1.PDF

by VD Kunz - Cited by 2

http://eprints.ecs.soton.ac.uk/10762/1/ESSDERC2004VDKunz.pdf

by DN da Silva - Related articles

http://www.inf.ufrgs.br/nangate/docman/conf_2009_esref_digeorgia.pdf

single electron transistors, self-assembled DNA, carbon nano-tubes, and resonant tunnel ..... stg2: This stage has a single 2-input XOR gate (U1) and a single wire. ... stg4: This stage has an inverter (U2) and a 2-input NAND. (U3) gate. ... by using AutoPTMate, we used a somewhat larger circuit which has 4 gates ...

http://fie-conference.org/fie2008/papers/1193.pdf

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http://silk.kookmin.ac.kr/professor_paper/dhkim/JJAP_RTSET_200004.pdf

increase the functionality implemented by a single gate in ... to the gate of a transistor its associated RTD contributes to the NDR2 current. ..... (f) RTD realization of two-input NAND. Vbias latch inverting latch ... nant-Tunneling Devices,” IEEE Electron Device Letters,. Vol. 17, no. 3, pp. 127-129, March 1996. ...

http://hal.archives-ouvertes.fr/docs/00/16/69/90/PDF/1033.pdf

Using the cell structure we build 2 and 3-input NAND gates showing their error probabilities. .... 2 (a) Diagram for a single input gate used for analyzing ..... electron transistors,” IEEE Transactions on VLSI Systems, vol. ...

http://hal.archives-ouvertes.fr/docs/00/16/67/74/PDF/CAN114.pdf

by N Joye - Related articles

http://infoscience.epfl.ch/record/105220/files/04401859.pdf

by K Rathnakannan - 2008 - Related articles

http://www.journal.tfc.kg.ac.rs/Vol_5-2/09-Rathnakannan-Ranjan.pdf

by PL Chen - 2005 - Cited by 21

http://ir.lib.nctu.edu.tw/bitstream/987654321/1509/1/010101012.pdf

by M Weis - 2009 - Related articles

http://www.adv-radio-sci.net/7/231/2009/ars-7-231-2009.pdf

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http://www.eecs.wsu.edu/~ysun/Carry Select Adder Using Fast All-one Finding Logic.pdf

called the single electron transistor, discussed later in the report. ..... A two-input NAND gate using SOI SETs have been demonstrated in [23]. ...

http://www.dstuns.iitm.ac.in/teaching-and-presentations/teaching/undergraduate courses/vy305-molecular-architecture-and-evolution-of-functions/presentations/presentations-2007/seminar-2/P2.pdf

4 Jan 2004 ... tape; now the mask descriptions are usually sent to the manufacturer electron- .... 1.4 Sketch a transistor-level schematic for a single-stage CMOS logic ... 1.11 Figure 1.72 shows a stick diagram of a 2-input NAND gate. ... 1.17 Design a 3-input minority gate using CMOS NANDs, NORs, and inverters. ...

http://www.aw-bc.com/info/weste/assets/downloads/ch1_1.11-1.15.pdf

by CJ Drury - 1998 - Cited by 496

http://zernike.eldoc.ub.rug.nl/FILES/root/1998/ApplPhysLettDrury/1998ApplPhysLettDrury.pdf

The performance and the power consumption of single-electron transistor (SET) ... logic gates are comparatively investigated by using the SPICE ..... When Vclk1 = Vclk2 = −2 V, the transfer of a single electron through the BDD unit is fully ... Simulated input–output transient characteristics of BDD NOR and NAND ...

http://iopscience.iop.org/0268-1242/24/6/065007/pdf/0268-1242_24_6_065007.pdf

by K Nepal - Cited by 43

http://www.cse.nd.edu/courses/cse40547/www/papers/10 - Bahar - Designing Logic Circuits for Probabilstic Computation in the Presence of Noise (DAC 05).pdf

by SM Menon - 1995 - Cited by 14

http://www.cs.colostate.edu/~malaiya/p/menon95.pdf

Single-electron transistor (SET): (a) the basic part consisting of two tunnel junc- ... Q0 + CgU (Cg is the gate capacitance), hence Ūgure 2 can also be ...... by the polarization of either of two neighbouring input chains can be ..... To realize the reversible NOR and NAND gates using SET parametron cells, one ...

http://www.informaworld.com/index/HP76F2H5GCJGX78X.pdf

tary MOS transistors and bipolar devices in a single process at a reasonable ..... [Rosseel88] that the BiCMOS two-input NAND gates becomes superior over its CMOS ... Figure 1 shows the layout of a BiCMOS inverter/driver using the circuit ... Operation of CMOS Transistors at 4K,” IEEE Electron Device Letters, 1993. ...

http://bwrc.eecs.berkeley.edu/Icbook/AdditionalMaterial/bicmos.pdf

by SHK Embabi - 1995 - Cited by 8

http://amsc.tamu.edu/SIS/Publications/pub/jounal/A bootstrapped bipolar CMOS (B2CMOS) Gate for low-voltage applications.pdf

using electrical currents to introduce a temperature gradient. .... two multi-valued logic gates based on single-electron transistors (SETs) that could ... input voltages they could make the NAND gate to behave as an OR gate, ...

http://www.nature.com/nnano/journal/v3/n5/pdf/nnano.2008.122.pdf

overcome these problems by using electron beam induced deposition (EBID) of carbon ... two multi-valued logic gates based on single-electron transistors (SETs) ... input voltages they could make the NAND gate to behave as an OR gate, ...

http://web.utk.edu/~mjzhang/natureNano.pdf

between input and output and the number of gates. So. 3^2 = 6 zone routing elements are used to minimize the ... islands and white dots represent single electron transistor ... the logic element is equivalent to a NAND gate and when ...

http://scialert.net/pdfs/jas/2008/2569-2576.pdf

by A Bindal - Cited by 5

http://www.engr.sjsu.edu/abindal/IOP nano 2006.pdf

Compared to single electron transistors and more ad- vanced quantum dot architectures, ..... for the NAND gate, respectively, if all input transistors are off. .... NAND/NOR gate is now extended by using more than three ...

http://www-be.e-technik.uni-dortmund.de/~gloesek/Download/pacha.tvlsi.pdf

by J Abella - Cited by 3

http://www.laas.fr/WDSN07/WDSN07_files/Texts/WDSN07-7D-04-Abella.pdf

by JM Quintana - Cited by 3

http://www2.imse-cnm.csic.es/~josem/ZPubs/ISCAS04.pdf

When a single particle collides with the oxide, electron-hole pairs are created. ... 2. Pull-down of a two-input NAND gate designed with ELT. ... P-MOS transistors are also designed using a edge-less shape, to easily maintain the ...

http://elianto.crema.unimi.it/vlsi/ICECS08.pdf

by HO Kim - 2006 - Cited by 8

http://www.cecs.uci.edu/~papers/aspdac06/pdf/p565_6A-2.pdf

by RH Klunder - Cited by 1

http://duteela.et.tudelft.nl/~jaapho/2004/SCEE04.pdf

by J Rose - 1993 - Cited by 222

http://www.eecg.toronto.edu/~jayar/pubs/rose/PIEEE93a.pdf

by A Muttreja - Cited by 5

http://www.princeton.edu/~niketa/publications/finfet_iccd07.pdf